Many different types of electronic communications are carried out for a variety of purposes and with a variety of different types of devices and systems. One type of electronic communications system involves those communications associated with BUS-type communications between two or more different components. For instance, computers typically include a central processing unit (CPU) that communicates with peripheral devices via a bus. Instructions and other information are passed between the CPU and the peripheral devices on a communications BUS or other link.
One type of communications approach involves the use of a PCI (Peripheral Component Interconnect) system. PCI is an interconnection system between a microprocessor and attached devices in which expansion slots are spaced closely for high speed operation. Using PCI, a computer can support new PCI cards while continuing to support Industry Standard Architecture (ISA) expansion cards, which is an older standard. PCI is designed to be independent of microprocessor design and to be synchronized with the clock speed of the microprocessor. PCI uses active paths (on a multi-drop bus) to transmit both address and data signals, sending the address on one clock cycle and data on the next. The PCI bus can be populated with adapters requiring fast accesses to each other and/or system memory and that can be accessed by a host processor at speeds approaching that of the processor's full native bus speed. Read and write transfers over the PCI bus are implemented with burst transfers that can be sent starting with an address on the first cycle and a sequence of data transmissions on a certain number of successive cycles. PCI-type architecture is widely implemented, and is now installed on most desktop computers.
PCI Express architecture exhibits similarities to PCI architecture with certain changes. PCI Express architecture employs a switch that replaces the multi-drop bus of the PCI architecture with a switch that provides fan-out for an input-output (I/O) bus. The fan-out capability of the switch facilitates a series of connections for add-in, high-performance I/O. The switch is a logical element that may be implemented within a component that also contains a host bridge. A PCI switch can logically be thought of, e.g., as a collection of PCI-to-PCI bridges in which one bridge is the upstream bridge that is connected to a private local bus via its downstream side to the upstream sides of a group of additional PCI-to-PCI bridges.
In PCI Express applications that provide a connection between MAC and PHY chips, an interconnection bus is used to transmit data and command therebetween. The number of pins available for input/output purposes is limited by the particular chip and package size thereof. Sometimes the number of pins is as much or more of a constraining factor than the amount of logic available on the chip dies. Moreover, in some applications the interconnections between chips is limited due to insufficient routing space and constraints. For instance, increased signal frequencies often require strict routing guidelines that may quickly exhaust the available routing space.
These and other limitations present challenges to the implementation of integrated devices with a variety of communications approaches.